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Business Issues of Microelectronics

Unit 2: Integrated Circuit Processing

Question 1

The broad classes of IC are:

custom ASICs and mask-programmed ASICs

ASICs and programmable devices

ASICs and merchant parts

ASICs and microcontrollers/microprocessors


Question 2

Choose the parts sold in high volumes:

FPGAs

Merchant parts

Arrays

Custom ASICs


Question 3

Complete the following statement: 'The problem with ASICs is ...'

their fixed cost/unit

their variable cost/unit

the restricted range of processes

the limited range of resources


Question 4

Choose the correct statement:

'Wafers are...'

made from sand

sawn from an ingot

intrinsic semiconductors

all of the above


Question 5

What are the basic processes in wafer fabrication?

Diffusion and metallisation

Deposition and micro-machining

Micro-machining and etching

Diffusion and deposition


Question 6

'The number of process steps...'

depends on the process(es) involved

depends on the interconnect complexity

depends on the use of isolated capacitators

increases for analogue and mixed signal ASICs


Question 7

'Wafers are tested at the foundry...'

using test inserts in the die

by measuring the current drain

by checking the process parameters are within limits

solely by visual inspection


Question 8

'The size of the die on a wafer is limited by...'

the wafer material

mechanical handling damage

the packages available

mask alignment limits


Question 9

These are the first steps on receipt of wafers. Number them in sequence.

   Examine the foundry test insert data

   Test them

   Visually inspect them

   Mount them in handling fixtures


Question 10

The next steps are (number the correct ones in sequence).

   Saw the wafer

   Sort and box the die

   Setup the wafer saw

   Setup the tester table parameters

   Run the test program

   Separate the die


Question 11

'The scribe channel is typically....'

equal to the saw thickness

twice the saw thickness

four times the saw thickness

eight times the saw thickness


Question 12

'Die separation is by...'

flexing the wafer

sawing through the wafer

sawing part way through and flexing the wafer

sawing through the wafer and its support material


Question 13

What is the impact of mechanical damage roughly proportional to?

The total length of saw cut

Half the number of die x half the die periphery

The depth of the saw cut

The resolution of the semi-conductor process


Question 14

Which of the following are inspected during assembly?

Full functional chip tests

Die bonding

Accelerated life tests

Lid sealing

Full functional test on the finished part

Hot and cold functional tests

Die attachment


Question 15

'Multi-project wafer services...'

are widely available

give rapid return

reduce project cost

reduce the cost of design functional validation


Question 16

'Multi-project wafer processing...'

produces small volume of parts at lower cost than conventional methods

extends programme ties

increases programme costs

reduces programme risk


Question 17

A split-batch process is?

Fully re-programmable

Partially re-programmable

Useful for designs with small well-defined uncertainties


Question 18

'A split-batch process...'

usually allows for one design iteration

can be cost-effective

reduces project risk and potential

All of the above 


Question 19

Which of the following statements are correct?

Masks are made using an optically flat glass plate

Masks are made by etching a layer of chromium on the plate 

Masks for high resolution processes are made full size 

Masks for low resolution processes sometimes use enlarged masks 
 


Question 20

What does photolithography on wafers use?

Masks made by photo-etching

Direct write e-beam exposure

Working masks made by photo-etching using an e-beam produced master mask

All of the above