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Microelectronic Technologies & Applications

Microelectronic Technologies and Applications

SPICE EXERCISE

CMOS LOGIC CIRCUIT DELAYS


Preliminary Information

You should have the NXClient already installed on your system.


Introduction

The circuit simulators within the CADENCE integrated circuit design system can be used to simulate digital and analogue circuits at the transistor level.

This exercise details the simulation and delay analysis of a simple CMOS inverter under no-load and loaded operating conditions using a variant of the Spice simulator,  Spectre.


The full walkthrough is now available as a PDF using the following link: Spice Walkthrough AMI 4233


 


Updated 24.01.06 JO Updated 26 10 11 NJC

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