Digital IC Design
Module Overview
Digital designs can be implemented across the entire range of ASIC technologies. Many of the design techniques established for discrete components are applicable to integrated circuit implementations and can be applied within the capabilities and limitations of the chosen target technology. This module considers the principles involved in engineering digital systems on silicon and features:
- Combinational and sequential design techniques
- Finite state machine design
- Full custom design
- Design for testability
A set of design walkthroughs is included to demonstrate the incorporation of cell library components, synthesised VHDL circuitry and full custom cells into a standard cell device.
A substantial design project then follows in which a given specification is designed, simulated, placed and routed on a standard cell device. The design project is assessed and takes up half the study time allocated to the module.
Contents
- Unit 1: Best practice digital design
- Digital designers guide
- Unit 2: Control circuitry design
- Unit 3: Full custom design
- Unit 4: Design for testability
- Unit 5: Design walkthroughs
- Revised 2011 entry and simulation of standard library components
- Revised 2011 entry, simulation and synthesis of VHDL components
-Revised 2011 entry and simulation of full custom components
-Revised 2011 Final Assembly, Simulation and Layout Updated R1.1 05/05/2011
- 2011 NCVHDL Simvision and Design Browser Walkthrough Basic
- 2011 NCVHDL Simvision and Design Browser Walkthrough Intermediate
- 2011 NCVHDL Basic And Gate Walkthrough Getting Started
- - entry
and simulation of standard library components
- Substantial Assignment
- Digital Designers Guide
- entry, simulation and synthesis of VHDL components
- entry and simulation of full custom components
- final assembly, simulation and layout
Suggested Study Plan
| Study Week | Unit | Unit / Assessment |
|---|---|---|
| 1 | 1 | Best practice digital design including Digital Designers Guide |
| 2 | 2 | Control circuitry design |
| 3 | 3 | Full custom design |
| 4 | 4 | Design for testability |
| 5 & 6 (part) | 5 | Design walkthroughs (4 off) |
| 6 (part) - 12 | Substantial Assignment, 85 hours (worth 100%) |
Tutor Profile
For all issues related to this module please contact Neil Cole
Jeff Ormerod
The tutor for this module is Jeff Ormerod, Head of Microelectronics at Bolton Institute. For a profile, please refer to the module on Microelectronic Technologies and Applications.
Suggested Reading
Details of textbooks used in this module.
Self Assessment Questions
Most of the units in this module have self assessment questions associated with them.
You are advised to attempt these questions as you study each module before checking the solutions.
Page last updated jh17 02/04/04