The following function is to be implemented in CMOS technology:
F = A (BC + BDE)
Calculate the number of transistors required if:
a) basic library cells
(NOT, AND and OR) were used.
b) F is implemented as a single
complex gate.
Answer
a) The implementation would require:
A 3 input AND gate for ABC
A 4 input AND gate for ABDE
A 2 input OR gate for ABC + ABDE
The 3 input AND gate requires one 3 input NAND gate followed
by an inverter
= 6 transistors (NAND) + 2 transistors (inverter) = 8
transistors
The 4 input AND gate requires one 4 input NAND gate followed
by an inverter
= 8 transistors (NAND) + 2 transistors (Inverter) = 10
transistors
The 2 input OR gate requires one 2 input NOR gate followed
by an inverter
= 4 transistors (OR) + 2 transistors (Inverter) = 6 transistors
Total = 8 + 10 + 6 = 24 transistors
b) A complex gate would require the inverse function for
F
F = ABC + ABDE
= AB(C + DE) Taking out AB as a common factor
F' = (AB(C + DE))'
= (AB)' + (C + DE)'
= (A'+ B') + (C'. (DE)'
= (A'+ B') + (C' . (D'+E')
We require 5 inverters to invert each of the variables
= 5 x 2 = 10 transistors
In the main section of the gate we will have 10
transistors
Therefore total number of transistors required = 10 + 10
= 20 transistors
Question 2
Use Shannon's expansion theorem to implement F as a pass
transistor circuit.
f(A,B,C,D,E)
= ABC + ABDE
Taking A,B,C and D as the control variables and E as the
data variable
f = A' B' C' D' (0) + A' B' C' D (0)
+ A' B' C D' (0) + A' B' C D (0) + A' B C' D' (0)
+ A' B C' D (0) + A' B C D' (0) + A' B C D (0) + A B' C'
D' (0) + A B' C' D (0)
+ A B' C D' (0) + A B' C D (0) + A B C' D' (0) + A B C'
D (E) + A B C D' (1)
+ A B C D (1)
At this stage we can construct the network and optimise
by looking for transistors with common control variables
or the same true and inverse control variable in two or
more branches connected to the same input. An inspection
of the Shannon expansion, however, provides a more efficient
way of performing the optimisation.
Consider the first 8 terms in the expansion. They all
produce a logic 0 on the output, all have a common variable
A' and all combinations of true and inverse for variables
B, C and D. The corresponding section of the truth table
illustrates this.
Network optimises to 0 for the data variable
A' for the control variable
By the same analysis the next 4 terms in the expansion
also produce a logic 0 output with AB' as common variables
and all combinations of true and inverse for variables C
and D. The corresponding section of the truth table is:
Network optimises to 0 for the data variable
AB' for the control variables
The remaining 4 terms in the expansion have differing output
requirements so can only be partially optimised. The corresponding
section of the truth table is:
Unique
Unique
Network optimises to 1 for the data variable
ABC for the control variables
The first term (1100) is unique. It will be implemented
as ABC'D' for the control variables and 0 for the data variable.
The second term (1101) is also unique. It will be implemented
as ABC'D for the control variables and E for the data variable.
The third and fourth terms (1110 & 1111) have common
variables ABC and both combinations of true and inverse
for variable D. They will be implemented as ABC for the
control variables and 1 for the data variable.
