1. Identify the three categories of PLD
2. What are the key differences between FPGAs and CPLDs.
| FPGA | CPLD |
|---|---|
| Structure consists of complex interconnects. | Has a simpler structure containing several sum of products logic arrays |
| Most commonly based on SRAM technology | Most commonly EPROM or EEPROM technology |
| Delay throught the device cannot be predicted | More predictable timing |
| Used for complex designs | Used for simple or moderate projects |
| Register rich | Fewer registers |
| More flexible for design implementation | Offers single-chip solution with fast pin-to-pin delays |
| Can contain higher-level embedded functions such as adders and multipliers and embedded memories | |
| support full or partial in-system reconfiguration, allowing their designs to be changed "on the fly" either for system upgrades or for dynamic reconfiguration as a normal part of system operation | |
| short delay before start up for configuation download | instant on |
CPLDs, with their PAL-derived, easy-to-understand AND-OR structure, offer a single-chip solution with fast pin-to-pin delays, even for wide input functions. Once programmed, the design can be locked and thus made secure. Most CPLD architectures are very similar, so it is important to evaluate the subtle nuances. In-system-programmability is a must for today's designs, and the ability to maintain pin-outs during design modifications ("pin-locking") is crucial. The limited complexity (<500 flip-flops) means that most CPLDs are used for "glue logic" functions. In older families, the high static (idle) power consumption prohibits their use in battery-operated equipment. CoolRunner devices are the notable exception, as they offer the lowest static power consumption (<50 microamps) of any programmable device.
FPGAs offer much higher complexity, up to 150,000 flip-flops, and their idle power consumption is reasonably low, although it is sharply increasing in the newest families. Since the configuration bitstream must be reloaded every time power is re-applied, design security is an issue, but the benefits and opportunities of dynamic reconfiguration, even in the end-user system, are an important advantage. FPGAs offer more logic flexibility and more sophisticated system features than CPLDs: clock management, on-chip RAM, DSP functions, (multipliers), and even on-chip microprocessors and Multi-Gigabit Transceivers.
-- Use CPLDs, especially for small designs, where "instant-on", fast and wide decoding, ultra-low idle power consumption, and design security are important (e.g., in battery-operated equipment).
-- Use FPGAs for larger and more complex designs.
3. What are the three main components of an FPGA
4. What is the main difference between an FPGA and a Micro-Controller
A micro is a sequential processing device. An FPGA processes the inputs simultaneously.