Back in 1965, General Instruments (GI) formed a Microelectronics Division, where they generated some of the earliest viable EPROM and EEPROM memory architectures. GI also created a 16 bit microprocessor, called the CP1600, in the early 70s. This was a reasonable microprocessor, but not particularly good at handling I/Os. For some very specific applications where good I/O handling was a necessity, GI designed a Peripheral Interface Controller (or PIC for short), which first emerged around 1975. It was designed to be very fast, since it was I/O handling for a 16 bit machine, but didn't need a huge amount of functionality, so its microcoded instruction set was small. This architecture design is substantially the architecture of the PIC16C5x architecture. Granted, the 1975 version was manufactured in NMOS, and was only available in masked ROM versions, but still a very good little microcontroller. At that time however, the market didn't particularly think so, and the PIC remained solely with a handful of large customers.
During the early 80s, GI took a long hard look at their business, and restructured, leaving them to concentrate on, essentially, power semiconductors. The GI Microelectronics Division became GI Microelectronics Inc. (a wholly owned subsidiary), which in '85 was finally sold to venture capital investors, including the fab in Chandler, Arizona. The venture capital people got rid of most of it, leaving the core business of the PIC and the serial and parallel EEPROMs. A decision was taken to restart the new company, named Arizona Microchip Technology, with an emphasis on embedded control to distinguish it from the rest of the pack.
As part of this strategy, the PIC165x NMOS family was redesigned to use one of the other things that the young company was good at; - EPROM! Hence the concept of the CMOS based, one-time-programmable (OTP) and eraseable EPROM program memory PIC16C5x family was born.
The PIC's are based on a simple processor utilising RISC technology, and a large number of registers. Typically, the PIC has a large register set (from 25 to 192 8-bit registers). There are up to 31 direct registers, plus an accumulator W, though Register1 (R1) to R8 also have special functions - R2 is the PC (with implicit stack (2 to 16 levels), and R5 to R8 control the I/O ports, while R0 is mapped to the register R4 (FSR).
The early PIC16x had only 33 fixed length 12-bit instructions, including several with a skip-on-condition flag to skip the next instruction (for loops and conditional branches), producing tight code which can be imperative within embedded applications. It's marginally pipelined (2 stages - fetch and execute) - combined with single cycle execution (except for branches - which take 2 cycles), performance is very good for its processor catagory.
The PIC17x family had more addressing modes (direct, indirect, and relative - indirect mode instructions take 2 execution cycles), 58 16-bit instructions, 232 to 454 registers, plus up to 64K-word program space (2K to 8K on chip). The high end versions also had single cycle 8-bit unsigned multiply instructions.
Since these early development days, the PIC range has blossomed to offer a very comprehensive range of 8-bit and 16-bit products. A simplistic overview of current PIC family Performance against Functionality can be seen in Figure 1.
[return to module u01/index section 1.2]
Updated 29.05.07 ML
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