A product is being built which meets a detailed specification. The circuit design engineer has to produce that product. They will have already a possible approach to the solution with an idea of how to begin the task. At this stage the design is purely conceptual, a solution can be visualised but there is not commitment as to the full implementation.
There are many ways in which a designer of electronic circuits can proceed. A sketch of the circuit configuration is one way forward. This might not be the most effective way of communication but it can help the designer!

Diagrams are used to convey the electrical description of analogue and digital circuit functions.
Symbols are used to represent ‘real’ components. ‘Wires’ are used to represent the interconnection of these components. The mix of the components and how they are connected determines the functionality of the circuit. The designer is responsible for putting together the components to meet the design specification.
Schematic capture can be considered as the method of capturing
the design concept in a diagrammatic format, specifically
within a computer aided design environment. It means that
the designer can work with the circuit and the information
can be presented in a clear manner. Defining a circuit as
a schematic means that it is possible to work with a logical
model of the required functionality while at the same time
producing the data that will be used to present the physical
finished version of the design.
The use of schematic capture is similar to standard drawing
techniques; the circuit is recorded as a series of graphical
symbols, components, and interconnections etc., which are
used to represent the design. CAD tools allow the capture
of the circuit to be done easily and equally important allow
for changes to be implemented with the minimum of effort.
An integral link is created between the conceptual design as seen by the engineer and the final physical link to production. The capture of the design at this stage allows not only the circuit diagram to be generated but also the integration of simulation and physical layout into the design process. The schematic Design stage then becomes the start point for a number of design technologies from circuit simulation to PCB design to FPGA (Field Programmable Gate Array) program data to ASIC (Application Specific Integrated Circuit) manufacturing data.1
Hierarchical design is key to modern efficient and productive design methodologies. Most CAD packages have the facility for the re-use of design. Team based design is the most effective way to reduce time-to-market one of the main key parameters in the modern electronic manufacturing industry. Breaking the problem into a series of small, often repeated elements, ensures that the design is quickly and correctly put together. Concurrent design approaches are made possible and the benefits of parallel design are maximised. Two methods can be applied and both will be considered: top – down and bottom – up.
The purpose of the schematic entry stage of the PCB design process is to bring together the various elements making up the final electronic circuit. The schematic is a diagrammatic representation of the circuit functionality.
The first stage in the production of a PCB is to enter all the details relating to the circuit components and the connections.
Schematic capture packages enable the designers to define a circuit in a graphical form. Parts are placed in the form of SYMBOLS on a sheet. A symbol is a graphical entity. It will have associated with it a number of NODES, which act as virtual connection points. The nodes related to the number of connection that would be made to the 'real' object the symbol represents.
Connecting the nodes with 'WIRES' or 'NETS' then completes the functionality of the circuit being entered. The entry at this stage requires the designer to have considerable knowledge functionality of the components represented in the symbols.

The diagram above shows and example of a schematic capture. It shows both the symbols and the interconnections. The use of symbols is an efficient method of using the computer's memory and disk resources by allowing multiple instances of a part to be represented by the same file.
It is normal to use symbols that are standardised though one of the many organisations that is set up for this purpose. Standard symbols mean that the information can easily be understood by all involved in the electronic manufacture process. The diagram below shows symbol representation of a 2 input NAND gate. The two symbols are from different standards. The most common in use today throughout the world is the ANSI style of symbol.

The symbols are usually stored in libraries of parts. These have been considered previously. Good and extensive libraries are the key to good CAD systems.
The symbol contains: Symbol name e.g. NAND shown.

Simulation code: Number connecting the symbol with its simulation model.
Graphic items: Geometrical shapes like lines, circle, arcs, rectangles, triangles and texts used to draw outline of the symbol.
Entries: Terminal points (nodes) for connecting wires.
When the symbolic shape as mentioned previously is used it becomes one gate in the basic component unit the part. The 2 input NAND gate exists as a basic unit of four gates with a single 14 pin package.
The part description contains: Part name
E.g. 7400 shown below contains 4 groups of NAND gates using the package DIP14.

Name prefix: Given to the component in layout e.g. IC, U etc.
Reference to the symbol: Representing the component on PCB layout e.g. DIP14
List of pins: Of layout component connected to power supplies and ground.
List of groups (gates): Within the package where each group contains.
Reference to the symbol: Representing this group on schematic diagram e.g. 2NAND.
Group pinout: Translation of entries in the group symbol to pins of the component on the PCB layout.
A key feature of schematic capture is the fact that the system can represent the system’s use of electrical interconnection. Interconnection represents the fact that there are physical links between the objects that are shown on the sheet and any objects that may be connected to that sheet in a multi-sheet design. The process of joining the electrical objects with some form of connection is known as ‘wiring’ the design. The same function as connecting wire between ‘real’ components is taking place.
Placing the ‘nodes’ of any two electrical objects so that they are in physical contact derives physical interconnection. In the simplest example, a wire touching a component pin is deemed to be in contact to that pin, and the schematic editor can deem a logical connection from the physical contact between the two items.
The pictures below show the simple example of the connection of two resistors by a piece of wire. The two devices are thus electrically connected. The first picture is an example of resistors connected by wire and the second is the schematic representation of that connection.

Logical connectivity is where the connection is derived from the presence of net names or identifiers. Logical connection does not require special drawing of wires or physical contact but relies on the matching of net names that associate these objects within a single sheet or across multiple sheets of a project.
The diagram below shows how nets are virtually connected even thought the diagram shows no ‘physical’ connection. The wires with the same names are treated as being electrically connected.

When entering components on a schematic there is more that must be considered about the component other than its idealised symbol. The symbol must have attached information that tells more about the specific device being used.
Digital devices are unusual in terms of the information that comes over from the symbol. The symbol is a guide to the functionality in Boolean algebra terms.
The difference in the available gates is in the name type, e.g. 74F373, 74LS345. The letters sandwiched between the 74, which describes the logic family and the number that describes the functionality of the device. The derivative name comes from the electronic output stage of the device based on transistor-to-transistor logic, TTL. The 74 stands for the ordinary commercial version of the device, made for operation at temperatures between 0oC and 70oC, the other type is the 54 which are military specification devices and can operate at temperatures between – 40oC and +125oC.
The first series of these devices were the 74xx, which were introduced by a company called Sylvania in 1963. Texas Instruments who further popularised the concept took on board the idea of a standard logic blocks. There were some restrictions with the initial devices and over the years the design of the gate has been modified to improve performance figures:
These are just some of the changes that have been made available by the different manufacturers. The key to all these changes has been the introduction of equivalent non-manufacturer dependant packages. The minimum key parameters of all types of gates can be guaranteed irrespective of the manufacturer and are published with easy access for all. The table below illustrates how the parameters can vary for a range of different gate types.
| BIPOLAR (TTL) | Bi CMOS |
CMOS | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| F | LS | ALS | ABT | 5V | 3.3 V | |||||
| HC |
AC |
AHC |
LV |
LVC |
ALVC |
|||||
| Speed | ||||||||||
| Gate propagation delay, tp (ns) | 3.3 | 10 | 7 | 3.2 | 5 | 5 | 3.7 | 9 | 4.3 | 3 |
| Maximum clock freq. (MHz) | 145 | 33 | 45 | 150 | 50 | 160 | 170 | 90 | 100 | 150 |
| Power Dissipation per gate | ||||||||||
| Bipolar 50% d.c. (mW) | 6 | 2.2 | 104 | |||||||
| CMOS quiescent (µW) | 17 | 2.75 | 0.55 | 2.75 | 1.6 | 0.8 | 0.8 | |||
| Output Drive |
||||||||||
| IOL (mA) | 20 | 8 | 8 | 64 | 4 | 24 | 8 | 12 | 24 | 24 |
In the previous section, a review of digital logic gates has shown the ‘family’ of the device determines the operational parameters. In the world of semiconductors the parameters that can vary are much more diverse and complex. A bigger mix of components will be used even in the simplest circuits, as below.

Consider the figure below that shows the operating parameter for a particular transistor, the 2SC1975 Silicon NPN Transistor for use in RF circuits.
Description: The 2SC1975 is a silicon NPN transistor in a TO220 type case designed for use in high power output amplifier stages such as citizen band communications equipment.
| Parameter | Absolute Max Rating |
|---|---|
| Collector-Emitter Voltage (RBE = 150 Ohm), VCER | 75V |
| Collector-Base Voltage, VCBO | 80V |
| Emitter-Base Voltage, VEBO | 5V |
| Collector
Current, IC |
|
| Continuous | 3A |
| Peak | 5A |
| Collector Power Dissipation (TA = +25°C), PD | 1.2W |
| Collector Power Dissipation (TC = +50°C), PD | 10W |
| Operating Junction Temperature, TJ | +150°C |
| Storage Temperature Range, Tstg | -55° to
+150°C |
| Parameter | Symbol | Test Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Collector-Base Breakdown Voltage | V(BR)CBO |
IC
= 100µA, IB = 0 |
80 |
- |
- |
V |
| Collector-Emitter Breakdown Voltage | V(BR)CER |
IC
= 1mA, RBE = 150 Ohm |
75 |
- |
- |
V |
| Emitter-Base Breakdown Voltage | V(BR)EBO |
IE
= 100µA, IC = 0 |
5 |
- |
- |
V |
| Collector Cut-off Current | ICBO |
VCB
= 40V IE = 0 |
- |
- |
10 |
µA |
| Emitter Cut-off Current | IEBO |
VEB
= 4V, IC = 0 |
- |
- |
10 |
µA |
| DC Current Gain | hFE |
VCE
= 5V, IC = 0.5A |
25 |
- |
200 |
|
| Collector-Emitter Saturation Voltage | VCE(sat) |
IC
= 1A, IB = 0.1A |
- |
0.15 |
0.60 |
V |
| Base-Emitter Saturation Voltage | VBE(sat) |
IC
= 1A, IB = 0.1A |
- |
0.9 |
1.2 |
V |
| Current Gain-Bandwidth Product | fT |
VCE
= 10V, I|C = 0.1A |
100 |
150 |
- |
MHz |
| Output Capacitance | Cob |
VCB
= 10V, f = 1MHz |
25 |
- |
- |
|
| Power Output | PO |
VCC
= 12V, Pin = 0.2W, f = 27MHz |
4.0 |
- |
- |
W |
| Collector Efficiency | 60 |
- |
- |
% |
The data about the device is very detailed. Similar data will exist for each other transistor available to the circuit designer. It is therefore important that the schematic diagram indicates exactly which semiconductor device is to be used. One other key element in the diagram is the choice of package that the device is to be used. Some of these have been considered already but there is an extremely wide range available.
The diagram below shows a physical representation of these. It should be noted that while this information is not shown on the schematic the data must be correct so that the single entry of data can be achieved. The diagram below illustrates some of the most common packages. Those packages that are shown having threaded portions are for high power applications and are designed for screwing into heatsinks. The designer must take care to ensure at the layout stage that due allowance has been made for heatsinking.

It can thus be seen that when entering the information into a schematic for a semiconductor device the labelling must be very effective. As a result standards have been developed which will enable users to understand which component is required. The correct standards will also provide information regarding a replacement should the one required no longer be available. Good management of company component libraries should minimise the effect of this.
Appendix 1 at the end shows how their numbers describes semiconductors. Two systems are currently in use a European and a Japanese version.
In this section some of the basic terminology and its purpose in the use of Cad Systems for electronic circuit schematic capture will be considered. Most of these terms are generic and are used by most CAD suppliers. There will, however, be in each package a variation in the use of the terms and there will be other specific phraseology used.
Pins are the interface primitives for components. They interface a component to the rest of the world. Basically, components have pins where an input or output is needed. Pins in schematic capture are usually equivalent to the pins on an IC, but sometimes that is not the case. Pins can also be used to connect a "black box" (which is a symbol representing something) to the rest of the world. These black boxes sometimes do not have schematic underneath (i.e. they don't represent another sub circuit) and just symbolize something non-material.
On most schematic capture systems pins are a single point typically only connected to another pin or net. Nets are used to connect the various pins on components to pins on other components.
Basic electrical objects used in wiring a schematic are the lines that are used to represent the carrying of electrical signals between components. These can be called either wires or nets. A net may have more than one connection point and joins several different symbols or parts of the circuit. The example below shows how a single net connects all the nodes five resistors together. The dark ‘dots’ on the wires represent junctions where an electrical connection takes place. A net is a collection of nodes that are electrically connected together. A wire is merely a visual representation of the corresponding net description.
Often it is possible to give connections specific names. The naming of a connection is very useful in identifying what goes where at later stages in the process. It provides a means of tying in the symbolic representation of the sheet with the physical representation later in the PCB design process. These identifiers are used to indicate electrical connections that may not be physically wired together, where for example connections are made between sheets in a multi-sheet design.

Net names can create connections that as stated above are not physically joined by wires. These objects include:
The diagram below shows part of a circuit. It illustrates the use of a port connector to provide an input onto a circuit. It shows the three most common type of signals which are circuit inputs; a signal input which the circuit is to operate on, a power connection where an external power source can be connected to provide energy for circuit operation and a ground signal to provide a reference which can be related to off board voltages.

A single net has two endpoints. At the endpoints, often it is the case that visual cues help in determining if a net is connected (e.g. the visual cues disappear if this occurs) or if a net is dangling/not connected (the visual cues are shown). When nets intersect another net in the middle then a midpoint visual cue is displayed.
These endpoint/midpoint cues are useful to indicate when nets are electrically connected or disconnected. The cues are also useful to see if nets, which are crossing, are connected or not.
A net is a collection of nodes that are electrically connected together. A wire is merely a visual representation of the corresponding net description.
Special nets are the power and ground connections. These should always be named. It is normal for simplicity not to show the connections on each symbol. Hidden pins are automatically connected to the power and ground lines of the system. These function in the same way as off sheet connectors. Each hidden pin is connected to all other hidden pins with the same name and also connected to a net of the same name, if present.
Physically a bus is a set of conductive paths that serve to interconnect the functional components of an electronic system or several diverse systems. Electrically a bus is a collection of specified voltage levels and/or current levels and signals that allow the various devices connected to the bus to communicate and work together properly.
For example, a microprocessor is connected to memories and input/output devices by certain bus structures. An address bus allows the microprocessor to address the memories, and the data bus provides for transfer of data between the microprocessor, the memories and the input/output devices such as monitors, printers, keyboards and modems. The control bus allows the microprocessor to control data transfers and timing for the various components. The figure bellows shows the number of potential connections for a Motorola 68000 microcontroller device.

The problem with these large numbers of pin count is that using the traditional schematic capture techniques and working with an A4 sized piece of paper it can be difficult to fit a single component and the details of the connections onto a single sheet. The result is a diagram, which will only serve to present the names of the connections onto the device. There will be little or no interconnection information between components.
The connectivity then becomes made through intersheet connections made by net merge or the equivalent. The information this presents may be necessary for the board layout stage but will be of little use to others e.g. when the design is being reviewed prior to manufacture or when test engineers are deciding on an appropriate strategy. Cross references can be used but since a net merge can occur from any page to any other page in the circuit the logical ‘flow’ of the design is lost.
Anyway in which the number of connections can be reduced thus becomes of great interest at the schematic stage of the design. The use of buses in the schematic capture enables much more information to be gained in a much more simplified approach.
Bussing together similar signals will greatly increase the clarity of a schematic. Buses need not, however, be restricted to the traditional address or data bus only. Control buses should be used where all the control and ancillary circuit signals can be grouped together. In a complex circuit these buses can then be combined into ‘superbuses’ that have a common connection point.
The labels used to describe a bus should be kept simple; each of the individual connections will be indexed within the bus; e.g. adr [5], the 5th line of the address bus. If the label is too long then it can be replaced with an alias. There is then the need, however, for a listing explaining the aliases used somewhere on the sheet.
A bus is represented in a schematic capture by a single thick line. Connections to pins are made via nets connected to the bus via a bus pick-off point. It must be remembered that buses are purely representations on the schematic, unless the bus has an attribute, which carries forward to the layout stage, they will appear as a set of discrete connections on the PCB. The diagram below illustrates some of these points.

It is essential that schematic diagrams have a considerable amount of information about the finished product. Many circuit diagrams will be too complex to be capable of being produced on a single drawing sheet, or page. The design may therefore consist of several related sheets, which must be taken together to view the complete circuit.
Notes are added to explain, enforce, and help future steps in the process. Two types of notes are usually considered, Page and Design. Each has a specific purpose in the production of the system.
These are details that are specific to the particular page of the schematic upon which they appear. They can be added to any page but will only appear on that page when the final circuit diagram is produced. A specific chip packaging detail would appear as a page note on the same page as the schematic of the chip.
These are details that are relevant tot the complete design and must appear on every page of the design. A revision box would appear as design notes.
A grid is an orthogonal network of two sets of intersecting perpendicular parallel equidistant lines. Grid systems are used for locating points, components, plated-through holes, conductor patterns, and other features on a printed board or printed board assembly. They are useful in defining the requirements for manufacturing, assembly, and testing because the locations do not need to be individually dimensioned as they are referenced to the nearest grid intersection. When a grid is specified and parts or board features are off the selected grid, they must be individually dimensioned and toleranced.
To make a schematic more regular and hence, easier to follow, it is usual to place object on the sheet in a fixed manner. It is usually done with the aid of the addition of a grid on the sheet. The grid is not shown on the final diagram but is used simply as an aide to the designer to produce a design that is more pleasing and orderly in its nature.
The regular grid provides visual means of assessing the clarity of the final diagram and the positioning of the symbols on the sheet. A grid is a dot raster form displayed on the screen, the horizontal and vertical displacements of the dots are normally user definable.

All three functions in the same way except that the grids are displayed in the form of dots, network of lines and cross.
Note that when using normal monitors the grid size is not infinitely variable. If the distance between dots for given grid value and given display scale is less than 10 pixels then grid raster will not be displayed even if grid is set. This is done to avoid too dense clustering of grid dots in smaller zoom scales.
The snap values define the resolution of the cursor movement during placement and relocation of objects. Rather than randomly placing an object on a sheet, the positions of relocated objects will be snapped to nearest coordinates, which are multiples of the snap value. The result is a much more controlled and easy to follow diagram. The snapping of nodes to a regular pattern provides a regular reference points throughout the drawing.
Asnap (angular snap) is used in all operation involving rotation of objects. The choice is made of the required angle to which the snap must be made.
E.G. If grid value is set to 100 mils and snap value to 50 mils, you will notice a rectangular matrix of dots on the screen which are at 100 mils distance from each other in vertical and horizontal direction. Now if you try to relocate an object, you will observe that the cursor with the object tagged snaps to coordinates, which will be at a distance of 50 mils from each other. So in this case object is placed exactly at grid dot positions or 50 mils from nearest grid dot.
The standard sheet sizes are considered in detail in Appendix 2. The table below lists some of the European Standard Sizes.
| ISO A Series |
Minimum
Border width from drawing frame to edge of sheet (mm) |
||
|---|---|---|---|
| Sheet Name | Landscape Format (mm) | ||
| A4 | 297 | 210 | 10 |
| A3 | 420 | 297 | 10 |
| A2 | 594 | 420 | 10 |
| A1 | 841 | 594 | 20 |
| A0 | 1189 | 841 | 10 |
In any situations there will be insufficient space on one sheet to fit all the circuit components. It must be remembered that not only are the circuit symbols and connections to be shown but there will be manufacturing information, page notes and other ancillary data to be included.
One method of dealing with this is to use a bigger sheet. In the past this has been the typical response. Hence, the definition of sheet sizes like A0, almost a m2 in area and 1 m x 1m in dimensions. To automate the printing of sheets this size required very specialist and expensive printers.
The modern response to this has been to make use of the easily available and relatively cheap, A4 or A3 printers. Instead of the entire diagram, being fitted onto a single page the device is partioned in sections and each section is printed on a separate page. When signals are required to move between sheets (or pages) can be made to do so easily, special symbols are used to show the cross sheet connection. It has the added benefit of enabling the circuit to be checked in smaller ‘batches’, making errors much more apparent and easier to correct.
An essential part of any electrical diagram is the identification of each separately replaceable part, described by an appropriate combination of letters and numbers. In electronic diagrams the recognized for of reference is the appropriate designator letter followed by a number of the same size on the same line with no separating hyphen or space to identify which one of probably many of the same components is being referenced. This may be followed by a hyphen and a suffix that further referenced the component; e.g. which package a particular gate is placed into.
Schematic diagrams use specific reference designators to indicate each type of component. The reference designator consists of one or two letters that are followed by a specific number as above. Examples of component designators are: resistor (R), capacitor (C), diode (CR), plug (P), socket (J), and delay line (DL). The letter U is usually used to signify an IC.
As well as the reference designators, numerical values should be included preferably employing the least number of numerals. This was considered in previous lecturers. For clarity, numerical values should be placed immediately adjacent to he symbol they relate to. Some recommended forms are shown below.

If some components were deleted as a result of design revisions then the remaining components would not usually be renumbered. The numbers not used should be listed in a table. If the circuit has a lot of components it may be useful to include for information, the highest reference designators used.
When editing a circuit in a Schematic Editor it is often necessary to repeat a connection of the same components connected in the same way, several times. Block editing is a feature of Schematic capture packages which allows the user to ‘cut and paste’ a section of circuit.
The connection information of the ‘new’ portion of the circuit is kept separate and does not overlay that of the original circuitry.
It can also be used to move circuits around between pages in a large design. Some packages facilitate a method whereby section of circuit can be copied and saved for use in other designs, increasing the opportunity for design re-use.
Attributes are additional pieces of information connected to a primitive object such as a component, net, pin, or graphic. Attributes specify information that is usually required by the netlisters or other design tool. Attributes are nothing more then text items which take on the form "name=value".
Examples of attributes include:
Some attributes are visible and some attributes are invisible such as specific device information. The figure below shows a single TTL NAND gate with all attributes visible.

Different CAD packages will use an attribute system to convey the required additional information to be associated with the various schematic objects. An attribute is connected to the object which makes the most sense to have that attribute (such as the pin which needs a pin number attribute), but sometimes there isn't a logical place for an attribute to be attached (such as the device attribute or slot information attributes), so an arbitrary graphic item is used as the object to receive the attribute.
The CAD schematic editor is a method of integrating the many different types of data that related to the various process involved in the complete design. It makes use of data management facilities to ease this task and make it invisible to the user. For example, each schematic sheet can be considered to exist as a design document in its own right; it is the data management systems that link these sheets together to produce the completed design. By being aware of the existence of the links it is possible to have a compete overview of the system performance.
The aim of schematic capture is to produce an accurate representation of an electronic circuit in a symbolic form. The schematic should use standard symbolism and as such be understandable by all. It should be accurate and true to the concepts of the circuit. The drawing must provide some documentation about itself.
International standards ensure commonality among design parameters.
The concept of wires and nets has been fully explored and the differences explained. The use of multiple sheets for a complex design is the most likely way for all modern designs to progress. Large A0 printers are fast becoming museum items. Packaging of the schematic and its related connections has been introduced and will be covered in more detail at later stages in the course.
The use of data minimisation techniques such as buses is very necessary to concentrate the data and thus make it more comprehensible by the user.
Automatic techniques to both connect and place the components on the schematic are available. These should be treated with care, as the result will not always be what the designer has expected. To be used with maximum effectiveness careful setting of the control parameters is necessary. Experience in using these techniques is the most important factor. They really are most useful when dealing with very complex circuits that require a very ordered strategy.
The functions that are available are not always used. The key to good design is to be able to apply the CAD package to your own individual problem. There are many options available but they are not always relevant to the solution of the problem.
The Part number is an essential part of the device identification process. Depending on where the parts are made the part numbers will mean something different. For example, The European nomenclature is different from the Japanese nomenclature that is different from the North American nomenclature.
Parts of each of these nomenclatures mean something different. They represent information that is important to the way the device is used. For example, what material the device is made out of, applications it can be used for, and a series of number that distinguish that part from all others soon can find device specifications and parts that may be compatible with the part that is being looked up.
The use of hierarchical design techniques fosters design-chain collaboration. It is much easier to design a simple element in terms of performance and efficiency of time. The hierarchical breakdown of a problem ensures that the solution will be effective. It may seem that there will be time wasted at the beginning in full consideration of the hierarchy but this will repeat rewards as the project progress.
Design reuse is one of the key elements that have been identified as being of particular importance to PCB designers. It is easy to organise and reuse duplicate circuitry through the use of hierarchical blocks.
View of entire reuse hierarchy tree lets you manage/edit all property occurrences from one location A hierarchical strategy provides means of integrating project data from multiple sources. All staff can use information in corporate databases and the commonality of data ensures minimum difficult at later stages in the project life. It is a major factor in enabling team-based design.
For Appendix 1 please click here
For Appendix 2 please click here
Discuss how Grid and Snap functions in a CAD package can be used to aid schematic capture.
Logical connectivity can be useful in complex diagrams. Explain what is meant by the term and how it can be aid the designer in producing a clearer diagram.
Explain the key differences between the F series 74XX logic and the ALS series. Discuss why this does not affect the designer of a PCB other than at the Simulation stage of the design process.
10th Feb Cf1/Ra1
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