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Printed Circuit Board Design

Printed Circuit Design

Unit 1: Review of PCB Design

Contents


1 Introduction

The aim of this unit is to introduce and review the basic principles of PCB design which have already been covered in the module Concepts of PCB Design.  Some people will have completed this module and should look on this unit as a review and a revision of the topics to be considered.  If you have not completed the module then this material will serve as an introduction to the field.

For some designers, the PCB design will be a natural and easy extension of the design process. But for many others the process of designing and laying out a PCB can be a very daunting task.

To design a PCB it often takes a great deal of knowledge and talent to position hundreds of components and thousands of tracks onto an intricate design that meets a whole host of physical and electrical requirements. Proper PCB design is very often an integral part of a design. In many designs (high speed digital, low level analogue and RF to name a few) the PCB layout may make or break the operation and electrical performance of the design. It must be remembered that PCB traces have resistance, inductance, and capacitance, in the same way as any circuit does.

The properties of PCB, and how they are constructed, can have a significant effect on the quality of signals and affect the operation of a circuit. The designer must be aware of these characteristics – knowing how, in some cases, to exploit them and, in other cases, how to avoid the problems that these characteristics can give rise to.

 

2 Standards

There are industry standards for almost every aspect of PCB design. These standards are controlled by the former Institute for Interconnecting and Packaging Electronic Circuits, who are now known simply as the IPC (www.ipc.org). There is an IPC standard for every aspect of PCB design, manufacture, testing. The major document that covers PCB design is IPC-2221, “Generic Standard on  Printed Board Design”. This standard superseded the old IPC-D-275 standard (also Military Std 275) which has been used for the last half century.

Local countries also have their own various standards for many aspects of PCB design and manufacture, but by and large the IPC standards are the accepted industry standard around the world.

 

3 Schematic Capture

Before layout of the PCB can begin, an accurate schematic diagram is needed. If the schematic is not accurate then the PCB will most likely end up a mess, and take twice as long as it should to produce the final design data.

“Rubbish-in, rubbish-out” is an often used quote, and it can apply equally well to PCB design. A PCB design is a manufactured version of the schematic, so it is natural for the PCB design to be influenced by the original schematic. If the schematic is neat, logical and clearly laid out, then it really does make the PCB design job a lot easier. Good practice has signals flowing from inputs at the left to outputs on the right. With electrically important sections drawn correctly, the way the designer would like them to be laid out on the PCB. Like putting bypass capacitors next to the component they are meant for. Notes on the schematic that aid in the layout are very useful.

E.g., “this pin requires a guard track to signal ground”, makes it clear to the person laying out the board what precautions must be taken. Even if it is you who designed the circuit and drew the schematic, notes not only remind yourself when it comes to laying out the board, but they are useful for people reviewing the design.

The schematic really should be drawn with the final PCB design in mind, where possible.

Make appropriate use of hierarchical structures to save endless repetition and make the schematic clearer and easier to follow.

3.1 Hierarchical Circuit Design

Traditional front-end design entry & engineering solutions do not foster collaboration between design team members.

The hierarchical design methodology involves careful division of projects into an extensive tree of smaller design entities.  Each entity has a specific function and a carefully declared method of interacting with the other entities.  The major reason for using hierarchical description is to hide the vast amount of detail in a design. By reducing the distracting detail to a single object that is lower in the hierarchy, one can greatly simplify many operations.

 

Figure 1: (a) Top-level of parallel-access shift register (b) Flip-flop subcomponent (FF).

 

 

 

Multiple uses of an entity indicate that the contents are to be repeated at each use. Graphically, an instance can be seen as an outline (called a footprint or a bounding box) that displays only the boundary of the function blocks definition, or it can be displayed more fully by showing the contents.

In general, a hierarchical design methodology provides the following benefits:

1.      It allows the designers to develop a more organised design flow. Collaboration is encouraged to ensure that critical system decisions are as a result of consensus at an early stage in the process. The lack of a team-based design can impact time-to-market objectives.

2.      The designers can focus on the functionality of a single design entity.  The clear definition if the input and output requirements of each entity as result of the operation of the previous stage.  Concurrency, thus encourages as each design team will have their own entities which can be designed and tested in isolation.  This is only possible if a clear and well-defined project structure implemented.

3.      The design overview is an excellent high-level view of the design’s overall structure. It is thus straightforward for controlling project managers to uncover any critical paths ain the design structure and plan accordingly.  Any potential troubles caused by these can be built into the project plan and no major delays or problems will impede the design progress.

Two fundamental practices in hierarchical design are used; top –down and bottom – up design techniques.  Each of these has its own strengths and weaknesses and allows designers to break a large design into the smaller more manageable entities as described above.  They will both be considered in more detail later.

Hierarchical Organisation

The most difficult problem that designers face is that of selecting a hierarchical organisation for their circuit. This organisation defines the way that the designer will think about the circuit, since layout is typically examined one hierarchical level at a time. If the wrong organisation is chosen, it may confuse the designer and obscure simple solutions to the design problem. The circuit may get so convoluted that an awkward hierarchy is worse than no hierarchy at all.

On the other hand, a clean hierarchical organisation makes all phases of design easier. If each level of the hierarchy has obvious functionality and aggregates only those components that pertain to that hierarchical level, then the circuit is easier to understand. For example, with a good hierarchy, simulation can be done effectively by completely testing each level of the hierarchy starting at the bottom. Good circuit hierarchy is similar to good subroutine organisation in programming, which can lead to code that is more self-documenting. For both structured programming and structured circuit design, a one-to-one mapping of function to structure provides a clean view of the final object.

Unfortunately, there is no way to describe precisely how to choose a good hierarchical organisation. The proper planning of a circuit is as much an art as the design of the actual components. For this reason, the techniques described here are only guidelines; they should be followed not blindly, but rather with an understanding of the particular design task at hand.

The first issue to consider is that of top-down versus bottom-up design. In the former, a circuit is designed with successively more detail; in the latter, a circuit is viewed with successively less detail. The choice of direction depends on the nature of the task, and the two techniques are almost always mixed in real design. The distinction is further clouded by the fact that the hierarchical organisation may be created with one method (top-down) and then actually implemented in the opposite direction.

Top – Down Design

In top – down methodologies, designers start with a high – level understanding of a design’s overall flow.  The general functionality of each design block is developed prior to creating the building blocks themselves.  Top – down design techniques tend to create more organised designs because the designers must first evaluate the design’s overall structure.  In addition, by focussing on structure and leaving details of a design undefined, designers can delay technical considerations until they are at more manageable levels.

As an example of top-down design, consider a circuit that computes the absolute difference between two numbers. This problem starts with the most abstract specification: a description solely in terms of inputs and outputs. In order to arrive at a hierarchical organisation that shows the complete circuit, a top-down design should be done. So, starting at the top, the circuit is decomposed into the subcircuits of the absolute value operation: subtraction and conditional negation. Subtraction can be further decomposed into negation followed by addition. Negation (in twos-complement number systems) can be decomposed into inversion followed by an increment. The entire set of blocks can be hierarchically divided into one-bit slices that do adding, inverting, and incrementing on a bit-by-bit basis. The lowest level of the design shows the layout for implementing these functions.

 

Figure 2: Top-down hierarchical organisation of an absolute-value engine

 

 

Bottom – Up Design

In bottom – up methodologies, designers first create the lower – level blocks and then integrate these blocks into higher – level structures.  Designers focus their attention on individual sub – blocks rather than the design as a whole.  Thus, individual blocks can be verified prior to building the entire design.  Bottom – up designs also highlight the benefits of re-useable code.  Splitting projects into smaller modules helps designers find redundant sections of a project.  Designers can then reuse individual blocks of code, which saves time.  In addition, designers can assemble commonly used functions into their regular design library, allowing blocks of code to be reused from project to project.

This style of design can be used when the details of a circuit are already known and must be properly implemented. For example, suppose that a 4K memory chip is to be designed, and further suppose that the design for a single bit of that memory is already done. Since the size of this bit of memory is the most important factor in the chip, all other circuitry must be designed to accommodate this cell. Therefore the design composition must proceed in a bottom-up manner, starting with the single bit of memory (see Fig. 1.14). In this example there are six levels of hierarchy starting at the single bit, aggregating a row of eight bits; stacking four of those vertically; stacking eight at the next higher level; and so on. The highest level of the hierarchy shows four arrays, each containing 32 × 32 bits. Memory-driving circuitry with the correct spacing is then placed around the bits.

 

Figure 3: Bottom-up hierarchical composition of a 4K memory array.

 

 

3.2 Measurement Units: Imperial or Metric

The chosen measurements should be decided at the schematic stage.  It can lead to confusion throughout the design if the original units are not compatible with either the PCB or the manufacturing equipment.  It is made more complicated by the fact that the PCB market is US dominated plus the fact that majority of electronic components were (and still are) manufactured with imperial pin spacing and hence, Imperial is the preferred unit.

§         A “mil” (or “mils”). 1 “mil” is the same as 1 thou, and is NOT to be confused with the millimeter (mm), which is often spoken the same as “mil”. [1]

As a general rule, use thou for tracks, pads, spacings and grids, which are most basic “design and layout” requirements. Only use mm for “mechanical and manufacturing” type requirements like hole sizes and board dimensions.

Many PCB manufacturers will follow these basic guidelines also, for when they ask for details to provide a quote to manufacture the board. Most manufacturers use metric size drills, so specifying imperial size holes really is counterproductive and can be prone to errors.

However, there are many components which have metric pin spacing and dimensions. Many component datasheets will also have metric dimensions even though the spacing are designed to an imperial grid.

The result of this is there must be very careful use of dimensions.

4 Basic Multi-Layer PCB construction

A typical multi-layer PCB (which covers most of the PCBs used to implement a complex circuit) consists of a sandwich of conducting and insulating layers.  It is onto this format that the PCB design must be produced.

 

Figure 4: Simple Layer Construction of a PCB

 

 

The sandwich of layers, or stack of layers, alternates between some sort of non-conducting dielectric layer, and copper foil, which has been patterned to form the circuit connections.

The result is that there are several decisions which must be made prior to beginning the layout stage of the PCB design. It these are not made now then it can cause considerable difficulty further in the design process.

4.1 Dielectric

The dielectric can be one of a number of materials (depending on the application) most common is FR4 and this is formed from an epoxy resin that is reinforced using glass fibres. This dielectric is manufactured in the form of a thicker layer (often called a laminate) or a thinner layer called a prepreg (pre-impregnated) that is normally manufactured from a resin-impregnated glass cloth.

Laminates and prepregs are available in a variety of thicknesses and can be bonded together to form thicker layers still if the application demands it. A typical laminate may be between 0.1 and 0.25mm thick whilst a typical prepreg may be between 0.05mm and 0.2mm.

4.2 Copper foil

The copper foil forming the interconnect is available in a number of weights e.g. 0.5oz, 1oz or 2oz. The weight refers to the weight of a standard area of the foil and 0.5oz  is about 10µm thick. 1oz is the most common for general-purpose applications, but the higher weights allow more current to be carried for a particular track width. For example, a 0.5oz track that is 20mm long and 0.5mm wide has a resistance of 38mW, whereas the same track in 2oz copper has a resistance of 9.5mW.

4.3 Pads

Pads  provide the copper surface that the ‘legs’ of the components will be soldered to, providing the electrical connection necessary.  The area of these pads has an important part to  play in the final manufacturing process

Pad sizes, shapes and dimensions will depend not only upon the components used, but also the manufacturing process used to assemble the board, among other things. The PCB package should come with a set of basic component libraries with some standard sized pad values.

There is an important parameter known as the pad/hole ratio. This is the ratio of the pad size to the hole size. Each manufacturer will have their own minimum specification for this. As a simple rule of thumb, the pad should be at least 1.8 times the diameter of the hole, or at least 0.5mm larger.

This is to allow for alignment tolerances on the drill and the artwork on top and bottom layers. This ratio gets more important the smaller the pad and hole become, and is particularly relevant to vias.

4.4 Vias and Through-Holes

The multiple layers of copper foil are interconnected by through-holes and vias. Both of these structures are holes in the laminate with electroplated copper on the surface forming a bridge between two (or more) conducting layers. This distinction between a through-hole and a via lies in their specific purpose.

Through-holes are only required where through-hole components are being used. In the case of a PCB using only surface mount devices, there are no through-holes (except for the external connectors, possibly). The surface mount devices are soldered to small areas (or lands) of copper on the external surface of the PCB and vias are used to carry the connections to other layers.

Holes in vias are usually a fair bit smaller than component pads, with 0.5-0.7mm being typical.

4.5 Tracking

There is no recommended standard for track sizes. What size track used depends on the electrical requirements of the design, the routing space and clearance available, and personal preference. As a general rule though, the bigger the track width, the better. Bigger tracks have lower DC resistance, lower inductance, can be easier and cheaper for the manufacturer to etch, and are easier to inspect and rework.

The lower limit of track width will depend upon the “track/space” resolution that the PCB manufacturer is capable of. For example, a manufacturer may quote a 10/8 track/space figure. This means that tracks can be no less than 10 thou wide, and the spacing between tracks (or pads, or any part of the copper) can be no less than 8 thou. Real world typical figures are 10/10 and 8/8 for basic boards.

The lower the track/space figure, the greater care the manufacturer has to take when aligning and etching the board and hence, the greater cost of production.

As a start, use say 25 thou for signal tracks, 50 thou for power and ground tracks, and 10-15 thou for going between IC and component pads. Some designers though like the “look” of smaller signal tracks like 10 or 15 thou, while others like all of their tracks to be big and “chunky”. Good design practice is to keep tracks as big as possible, and then to change to a thinner track only when required to meet clearance requirements.

In practice, track width will be dictated by the current flowing through it, and the maximum temperature rise of the track that can be tolerated. Remember that every track will have a certain amount of resistance, so the track will dissipate heat just like a resistor. The wider the track the lower the resistance. The thickness of the copper will also play a part, as will any solder coating finish.

The calculations to figure out a required track width based on the current and the maximum temperature rise are a little complex. A track width calculator program can be found at www.ultracad.com/calc.htm,

4.6 Clearances

Electrical clearances are an important requirement for all boards. Too tight a clearance between tracks and pads may lead to “hairline” shorts and other etching problems during the manufacturing process. These can be very hard to fault find once the board is assembled.

At least 15 thou is a good clearance limit for basic through hole designs, with 10 thou or 8 thou being used for more dense surface mount layouts.

For 240V mains on PCB’s there are various legal requirements, and it is necessary to consult the relevant standards. As a rule of thumb, an absolute minimum of 8mm (315 thou) spacing should be allowed between 240V tracks and isolated signal tracks. Good design practice dictate much larger clearances than this anyway.

For non-mains voltages, the IPC standard has a set of tables that define the clearance required for various voltages. The clearance will vary depending on whether the tracks are on an internal layer or the external surface. They also vary with the operational height of the board above sea level, due to the thinning of the atmosphere at high altitudes.

5 PCB Layout

Begin by setting a “snap grid” and cursor, components and tracks will “snap” into fixed grid positions. Not just any random size grid, but a fairly coarse one. 100 thou is a standard placement grid for very basic through hole work, with 50 thou being a standard for general tracking work, like running tracks between through­hole pads. For even finer work use a 25 thou snap grid or even lower.

The grid is important because it will keep components neat and symmetrical. It makes future editing, dragging, movement and alignment of tracks, components and blocks of components easier as the layout grows in size and complexity.[2]

5.1 Imported Data

A netlist is essentially a list of connections (“nets”) which correspond to your schematic. It also contains the list of components, component designators, component footprints and other information related to the schematic. The netlist file can be generated by the schematic package.

 

Figure 5: Typical rats Nest Display.

 

 

The job of component placement will be made infinitely easier by having a “rats nest” display enabled. If there is one reason for going to the trouble of drawing up an accurate schematic and importing a netlist, this is surely it. For large designs, a rats nest display is essential.

A rats nest display is one where the program will draw a straight line (not a track) between the pads of components which are connected on the schematic. In effect, it shows the connectivity of the circuit before beginning to start laying out tracks. At the start of board layout, with all components placed down randomly, this will appear as a huge and complicated random maze of lines. Hence the name rats nest.

With the rats nest display enabled, it will be almost possible to lay out all components optimally in no time, without having to lay down one single track. The rats nest display will effectively show what your tracks will connect to. The rats nest lines should disappear when routed. The design will get less  “complicated looking”. When all rats nest lines disappear, board is fully routed.

5.2 Component Placement & Design

An old saying is that PCB design is 90% placement and 10% routing. The concept that component placement is by far the most important aspect of laying out a board certainly holds true. Good component placement will make the layout job easier and give the best electrical performance. Bad component placement can turn a routing job into a nightmare and give poor electrical performance. It may even make the board unmanufacturable.

Auto Placement tools are available in many higher end PCB packages. Professional PCB designers do not use Auto Placement tools, it’s that simple. Don’t rely on the Auto Place feature to select the most optimum layout. It will never work (unless it’s an extremely simple board), regardless of what the program makers claim.

These tools do have one useful function however, they give an easy way to get components initially spread across the board.

Every designer will have their own method of placing components. So there is no absolute right way to place components. But there are quite a few basic rules which will help ease routing, giving the best electrical performance, and simplifying large and complex designs.

At this point consider the basic steps required to go about laying out a complete board:

The hallmark of an inexperienced designer is a board that has every component evenly spaced out, and then has thousands of tracks and vias crisscrossing the board. It might work, but it can be ugly and inefficient, not to mention bigger and more expensive to manufacture.

The best way to start the layout is to get ALL components onto the screen first. With all the components on screen, there is a good indication of whether or not the parts will easily fit onto the size (and shape) of board required. If it looks like it’s going to be a tight fit then it  will be necessary to work hard to try and keep the component spacing “tight”, and the tracking as efficient as possible. If it looks like there is plenty of room then it is possible to be more liberal in layout.

Partition off electrically sensitive parts of the design into bigger blocks. One major example is with mixed digital and analogue circuits. Digital and analogue just do not mix, and will need to be physically and electrically separated. Another example is with high frequency and high current circuits, they do not mix with low frequency and low current sensitive circuits.

As a general rule,  components should be neatly lined up. Having ICs in the same direction, resistors in neat columns, polarised capacitors all around the same way, and connectors on the edge of the board makes the board look efficient. Don’t do this at the expense of having an electrically poor layout, or an overly big board. Electrical parameters should always take precedence over nicely lined up components.

5.3 Routing

Routing is the process of laying down tracks to connect components on the board.

In order to understand the language of routing some definitions are useful.

Manhattan Length is the shortest path that a wire can have when it must be connected using only segments that are confined to either the X axis or Y axis. Calculating the Manhattan Length is quite simple. One need only subtract the X coordinates of the two end points from each other and the Y coordinates of the two end points from each other and sum these two dimensions.

Knowing this, it is easy to see how prior to  routing analytical tools can estimate the length of nets, and, therefore, their time delay, prior to routing. With a well run autorouter, it is possible to have post route lengths that agree with preroute predictions to small fractions of a nanosecond. This is one of the more valuable features of X-Y routing.

Detour Routing- Detour routing is any routing of a net or wire that exceeds the Manhattan Length. If timing were dependent on maintaining the Manhattan length predicted at preroute analysis, this design would fail its timing specifications. When designs are high speed and timing budgets are worked out at the preroute stage, which is common in very high speed, high performance designs, allowing this detour routing may be fatal.

Net- A collection of wires that connects all of the points or pins in a single circuit.

Wire- The connection between any two adjacent pins in a net.

Segment- A portion of a wire when routed. It is possible for a wire to be made up of several segments if a number of vias are needed to find open space in the signal layers. However, it is uncommon to see a wire with more than three segments.

Straight Wire- a wire that is pure horizontal or pure vertical. These wires usually need to be routed first, because the number of possible solutions without detour routing is limited.

Rats Nest- A “crow flies” plot of all of the potential connections between the pins of all of the parts in a printed circuit board. It illustrates the demand for wire space that a particular component placement puts on the wiring surfaces of a proposed PCB stackup. This is a valuable plot, because it allows a designer to assess the distribution of wiring in a design. Based on these plots, placements can be adjusted to even out the wire demand and routing strategies can be devised to insure all wires fit into the minimum number of layers.

Routing Via or Turning Via- a via used to change layers or change directions when routing a wire

Auto Routing

Auto routing is the process of getting the PCB software to route the tracks. It will even attempt to route the entire board. Most of the medium to top range PCB packages will do this.

Auto routers come in handy when there are complex boards with not much routing space, on non-critical parts of the layout. Non-critical parts of a board might include low frequency or static control signals to components like LED displays, switches and relays to name a few.

Advanced autorouters do come with tools specify exactly how to electrically important tracks laid out.

Never use an auto router to do a complete board. Use it on a very specific non-critical area of the board, and some excellent results are possible. It is possible to auto route a single connection, and this is sometimes handy when having trouble finding routing space in the final phase of layout.

5.4 Clean Up Pass

Once finished routing, the board isn’t done quite yet. There are a few last minute checks and finishing touches that should be manually done.

5.4 Design Rule Check (DRC)

Design Rule Checking (DRC) allows automatic checking of the  PCB design for connectivity, clearance, and other manufacturing errors. With the large and complex PCBs being designed today, it is impractical to manually check a PCB design. This is where the DRC comes into its own, it is an absolutely essential step in professional PCB design.

Examples of what can be checked with a DRC are:

  1. Circuit connectivity. It checks that every track on the board matches the connectivity of the schematic.
  2. Electrical clearance. Check the clearance between tracks, pads, and components.
  3. Manufacturing tolerances like min/max hole sizes, track widths, via widths, annulus sizes, and short circuits.

A complete DRC is usually performed after finishing the PCB. Some packages however have the ability to do “real time” (or “online”) DRC checking as the board is created. For instance, it won’t connect a track to a pad it shouldn’t go to, or violate a clearance between track and pad.

5.5 Forward and Back Annotation

Forward Annotation is when changes are made to the existing PCB layout via the schematic editor. The program will take the schematic netlist and component designators, and import them into the PCB design, and make any relevant changes. Some packages will also automatically remove old PCB tracks that are no longer connected. This can be done at any time during the PCB layout. If the schematic is updated, then forward annotate changes into the PCB design.

Back Annotation is when there is a change one of the component designators (eg. “C1” to “C2”) on the PCB and then automatically update this information back into the schematic. More advanced back annotation features allow swapping gates on chips, and performing other electrical changes.

6 Manufacturing Data

Layer Schematics

The process of design generates schematics for each of the ‘layers;’ of the finished board.  The most obvious of these are the copper interconnect patterns which are required for each layer of the board.  There are, however, other patterns which re also generated at this stage of the process.

Silkscreen

The “silkscreen” layer is also known as the “component overlay” or “component layer”. It is the layer on the top of the board (and bottom if needed) that contains component outlines, designators (C1, R1 etc), and free text.  Many modern surface mount boards have such a high component density that there is no use for this layer

This is added to the board using a silkscreening process. White is a standard colour, but other colours are available upon request. It means that it is possible to mix and match colours on the one board, but usually at extra cost.

When designing your board, make sure to keep all component designators the same text size, and oriented in the same direction.

When laying out own component footprints, were possible, make sure that a component overlay is added that reflects the actual size of the component. This way enables the designer to tell at a glance how close the components can be physically positioned. Ensure that all polarised components are marked, and that pin 1 is identified.

As a general rule, don’t put component values on the silkscreen, just the component designator.

Solder Mask

A solder mask is a thin polymer coating on the board which surrounds pads to help prevent solder from bridging between pins. This is essential for surface mount and fine pitch devices. The solder mask typically covers everything except pads and vias. The PCB program will automatically remove solder mask from pads and vias. The gap it leaves between the pad and the solder mask is known as the “mask expansion”. The mask expansion should usually be set to at least a few thou. Be careful not to make it too big, or there might be no solder mask between very fine pitch devices.

The solder mask is displayed in the PCB package as a negative image, just like the power plane. Under normal circumstances don’t put anything on the solder mask layer.

On most standard quality boards, the solder mask is laid directly over the bare copper tracks. This is known as Solder Mask Over Bare Copper, or SMOBC.

Vias can be covered with solder mask, this is known a tenting. This is useful for close tolerance designs, to prevent solder from flowing into vias.

Doumentation

The documentation of a printed board assembly consists of several drawing types that are included or referenced in the documentation package. Not all drawings are always supplied to the fabricator or to the assembly company; however, the designer must have a good understanding of the minimum information necessary to convey the design intent. The IPC-D-325 defines three types of documentation packages. These are:

Class A: Minimal Documentation - This is usually used for internal use and consists primarily of a copy of the layout and artwork in hard copy or NC format. The information requires a great deal of co-ordination between the design and manufacturing disciplines. Notes on the layout convey much of the needed information. Class A documentation requires the use of a manufacturer that can produce a functional product from the information supplied.

Class B: Moderate Documentation -This includes a complete board description without information as to the manufacturing allowances that are included in the design. The parts list and assembly drawing are also supplied to the assembler. CAD data on conductor routing describes the interconnectivity of the circuit and is used by the manufacturer to derive electrical test data. A schematic, logic diagram, or net list may also be supplied. Class B documentation requires working with a manufacturer and assembly company that has a strong CAD/CAM background and an understanding of what the designer expects.

Class C: Full Documentation - This includes a complete procurement package that may be sent to multiple suppliers with each producing an identical part. The information is self sufficient and includes, as a minimum, the master drawing, the assembly drawing, bill of material (BOM), schematic or logic diagram, test specifications, artwork in hard copy and electronic form, and an electronic description of the design. In addition, a panel layout may also be included, especially if the assembly is to be built in panel format.  The tooling features are defined and located and manufacturing allowances included in the design are identified.

The master drawing describes the unpopulated printed board and all the features that become a part of the board. Usually it is for a single board even though the board manufacturer will build the board within a panel. The master drawing defines the physical outline of the printed board as well as the conductive patterns and holes. This includes the printed board profile, construction in terms of dielectric spacing and thickness, and cut-outs and notches included in the periphery of the finished board.

The assembly drawing defines the location of all the components that are associated with the assembly. A reference designator is used to co-ordinate the part identification and location to the electronic diagrams (logic or schematic) and the parts list (or Bill of Materials: BOM). The BOM may be supplied as a computer listing since the electronic forms are often used to tie in to the material issuing system of the assembler.

Typical Documentation Package

A typical printed circuit board documentation package consists of a board detail drawing, a master pattern drawing or copies of the artwork masters, an assembly drawing, a parts list or bill of material, and the schematic drawing.

The documentation methodology described here is based on the assumption that the schematic, parts list, and circuit board layout have been created using computer-aided tools or have been captured in computer-readable format.

Although a manually prepared data package would contain the same basic manufacturing, assembly, and test information, its use should be limited to building small quantities of noncomplex PCBs, such as engineering prototypes.

There are a number of different types of drawing and electronic media (data formats) that support board fabrication, assembly and test. These are illustrated in Figure 6.

Drawing

Common Data Format

Fabrication

Assembly/Test

Master

Excellon

NC Drill

NC route

Board outline

N/A
 

Gerber plot

Circuit layers

Solder mask

Marking

N/A

Assembly

N/A

Solder paste

Master

ASCII

Aperture list

Drill data

Readme.txt file

N/A

Assembly

N/A

Solder paste

Pick and Place data

Parts list

Board detail

HPGL plot

Manual drill/machining

Manual route

Board outline

N/A

Assembly

N/A

Manual part placement

Mechanical assembly

Schematic

IPC-D-386 and GENCAM

Bare board test

ICT and functional test

Figure 6: Drawing and Data Formats

Content, Format and Structure

Artwork content must provide all the information and documentation needed for cost-effective bare board fabrication. Figure 7 list the most common content of an artwork package with an indication of current industry standards.

When establishing such documentation, the designer must tailor the data package to the specific needs of the fabricator that will produce the PCB.


Artwork/Data Format Comment

Circuit layer 1

Gerber

Component side

Circuit layer 2

  

Circuit layer 3

  

Circuit layer 4

  

Circuit layer 5

  

Circuit layer 6

Solder side

Drill graphics

  

Board fabrication

Board detail drawing

Component-side solder mask

  

Solder-side solder mask

  

Component side marking

Silkscreen

Solder side marking

Silkscreen

Drill file

Excellon

NC drill data

Aperture list

ASCII

  

Net list

ASCII

  

Readme file

ASCII

Description of package contents

Figure 7: Content of a Typical Artwork/Data Package

7 Design for Manufacture

In this section we will consider the data which should be generated to for the production of the PCB and for its use later in the electronics manufacture process.

7.1 Panelisation

For automatic assembly with a pick-and-place machine then it pays to get as many boards onto the one “panel” as possible. A panel is simply a large PCB containing many identical copies of the board. It takes time to place a board into position on a pick and place machine, so the more boards can be loaded, the more cost effective the manufacturing will be.

A panel will also contain tooling strips on the top and bottom, to allow for automated handling of the panel. Different manufactuers may have different maximum panel sizes they can produce.

Each individual board can be “routed out” and joined with “breakout tabs”, or simply butted together and scoured out with a “V groove”. A V groove is a score mark placed on the board that allows “snapping” of the board along the groove. A breakout tab is a small strip of board perhaps 5-10 mm long joining  board to panel. Small non-plated holes are also drilled along this strip, which allows the board to be snapped or cut out of the panel after assembly.

7.2 Tooling Strips

Tooling strips are strips of blank board down the top and bottom side of the board. They contain tooling holes, fiducial marks, and other manufacturing information if required.

Standard tooling holes are required for automated handling of the board. 2.4mm and 3.2mm are two standard hole sizes. Four tooling holes per panel is sufficient, one in each corner.

The tooling trips connect to the board(s) with breakout tabs or V Grooves. 

7.3 Fiducial Marks

Fiducial marks are visual alignment aids placed on the PCB. They are used by automated pick and place machines to align the board and find reference points. A video camera on the machine can identify the center of fiducial marks and use these points as a reference.

On a panel there should be 3 fiducial marks, known as global fiducials. Bottom left/right and top left corners. They should be at least 5mm away from the board edges. They can be mounted on the tooling strips.

The fiducial mark should be a circular pad on the copper layer  typically of diameter 1.5mm. The fiducial should not be covered with solder mask, and the mask should be removed for a clearance of at least 3mm around. The pad can be bare copper or coated like a regular pad.

Two local fiducial (one in opposite corners) is also required next to each large fine pitch surface mount device package on the board.

7.4 Thermal Relief

If solidly connected, a surface mount pad to a large copper area, the copper area will act as a very effective heat sink. This will conduct heat away from the pad while soldering. This can encourage dry joints and other soldering related problems. In these situations a thermal relief connection, which comprises several (usually 4) smaller tracks connecting the pad to the copper plane. Thermal relief options can be set automatically in many packages.

 

Figure 8: Typical Thermal Relief Pad (Black areas are where copper is removed)

 

 

Standard professionally manufactured boards will typically have solder mask over bare copper (SMOBC) tracks, and a tin finish on the pads and vias which is Hot Air Leveled (HAL). Hot air leveling helps most surface mount components to sit flat on the board.

For large and critical surface mount components, a gold “flash” finish is used on the pads. This gives an extremely flat surface finish for dense fine pitch devices.

Peelable solder masks are available, and are handy for temporary masking of areas on the board during wave soldering or conformal coating.

7.5 Electrical Testing

A  finished PCB  canchecked for electrical continuity and shorts at the time of manufacture. This is done with a automated “flying probe” or “bed of nails” test machine. It checks that the continuity of the tracks matches the PCB file. It may cost a extra, but this is mandatory for multi-layer boards. If there is a manufacturing error on one of the inner layers, it can be very difficult to fix.

7.6 Submitting Design for Manufacture

The first thing to know is which format to send the PCB file in. Supplying the original PCB package file will ensure that what is seen on the screen is what will be got get when te board is delivered. Unless there is a good reason to do so, don’t supply the files in any other format.

Gerber files are the traditional and industry recognised file format, all major manufacturers will accept them.

The manufacturer will ask for a lot of information before they quote, ask them what is needed to provide with the file. Here is a basic checklist:

Many manufacturers will have “prototype” services where they will fit as many boards onto a standard “panel” as they can, all for one fixed price.

In most cases there will be a charge for a “tooling” cost. This is the cost of printing the photo masks for the board, and also setting up their machines. This is usually a one-off cost, so if the same board is manufactured again, there won’t be a the tooling charge.

8 Multi - Layer Design Issues

A multi layer PCB is much more expensive and difficult to manufacture than a single or double sided board, but it really does give you a lot of extra density to route power and signal tracks. By having the signals running on the inside of the board, more components can be more tightly on the board to give a more compact design.

Multi layer boards usually come in even number of layers. With 4, 6, and 8 layer being the most common.

A typical 6 - layer board is illustrated in the diagram below.

 

Figure 9: Multi Layer Board Construction

 

With a multi layer board, typically dedicate one complete layer to a ground plane, and another to power. If a digital only board, then dedicate the entire power layer also. If there is room on the top or bottom layer, it si possible to route any additional power rail tracks on there. Power layers are almost always in the middle of the board, with the ground closer to the top layer.

Once power has been taken care of on the inner layers, there will be much more room available for signal tracks.

If power planes are vital, and you have a lot of connections to route, then move from 4 to 6 layers. Six layers will gives four full signal routing layers and two layers dedicated to power. Eight layers and above is basically more of the same.

With multi layer design comes the options of using different types of vias to improve routing density. There are three types of vias:

Through vias go through the whole board, and can connect any of the top, bottom or inner layers. These can be wasteful of space on layers which aren’t connected.

“Blind” vias go from the outside surface to one of the inner layers only. The hole does not protrude through the other side of the board. The via is in effect “blind” from the other side of the board.

“Buried” vias only connect two or more inner layers, with no hole being visible on the outside of the board. So the hole is completely buried inside the board.

 

Figure 10:  Examples of Different Via Types

 

 

Blind and buried vias cost more to manufacture than standard vias. But they are very useful, and almost mandatory for very high density designs like those involving Ball Grid Array (BGA) components.

Note:  The issues raised in the following sections will all be raised in much more detail later in this module.

8.1 Power Planes

It is good practice to use “power planes” to distribute power across the board. Using power planes can drastically reduce the power wiring inductance and impedance to components. This can be vital for high speed digital design for instance. It is good design practice to use power planes whenever possible. They can even be used on double sided boards, if most of the signal tracks are on the top layer.

A power plane is basically one solid copper layer of board dedicated to either the Ground or Power rails, or both. Power planes go in the middle layers of the board, usually on the layers closest to the outer surfaces. On a 4 layer board with complex power requirements it is common to dedicate one layer to the ground plane, and another layer to the various positive and negative power tracks. Ther ground rail is usually thesignal reference line, so a ground plane is first preference before a power plane is considered.

On a normal tracking layer, the board is assumed to be blank, then lay down tracks which will become theactual copper tracks. On a power plane however, the board is assumed to be covered with copper.

8.2 Good Grounding

Grounding is fundamental to the operation of many circuits. Good or bad grounding techniques can make or break the design. There are several grounding techniques which are always good practices to incorporate into any design.

8.3 Good Bypassing

Active components and points in the circuit which draw significant switching current should always be “bypassed”. This is to “smooth” out the power rail going to a particular device. “Bypassing” is using a capacitor across the power rails as physically and electrically close to the desired component or point in the circuit as possible

8.4 High Frequency Design Techniques

High frequency design is where consideration is given the effects of parasitic inductance, capacitance and impedance of the  PCB layout. If the signal is too fast, and the track is too long, then the track can take on the properties of a transmission line. Proper transmission line techniquesare not used in these situations then there may be reflection and other signal integrity problems.

8.5 Double Sided Placement

Placing components on both sides of a PCB can have many benefits. There are two main driving factors behind a decision to go with double sided loading. The first is that of board size. If a particular board size is required, and all the components won’t fit on one side, then double sided load is an obvious way to go. The second reason is that it is required to meet certain electrical requirements. Often these days, with dense high speed surface mount devices packed onto a board, there is either no room for the many bypass capacitors required, or they cannot be placed close enough to the device to be effective. Ball Grid Array (BGA) devices are one such component that benefit from having the bypass capacitors on the bottom of the board.

9 Summary

The previous material has been a brief overview of the processes and practises of producing a practical printed circuit board.  The design has been considered from the conceptual stage of design entry to the final data generation for submission to the PCB manufacturer to construct the final board.

If the correct design approach is taken then the result should be an operational PCB which meets all the requirements of the electronic system design.

The remainder of this module will consider the issues and approaches taken to ensure correct and efficient PCB operation in the condition that are required for today’s intense electronic circuit performances.


[1] The term “mil” comes from 1 thou being equal to 1 mili inch.

[2] Good PCB layout practice would involve you starting out with a coarse grid like 50 thou and using a progressively finer snap grid if your design becomes “tight” on space. Drop to 25 thou and 10 thou for finer routing and placement when needed. This will do 99% of boards. Make sure the finer grid you choose is a nice even division of your standard 100 thou. This means 50, 25, 20, 10, or 5 thou.

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