The thickness of the electroplated layer at any one point is a function of the current density at that point on the board. The layer will only be of even thickness if anode and cathode are two parallel and continuous plates; any divergence from this will result in differences in current density, and correspondingly in thickness. Particular effects concern the current crowding onto isolated tracks, and the corners of tracks, and the reduced current down through-plated holes. In the down-hole case, the thickness of the deposit may also be limited by the availability of fresh copper ions.
Over-thick tracks will lead to reduced solder mask thickness over the tracks and the potential for breakdown of the protective coat. As the tracks plate sideways as well as upwards, this may also create an over-wide track that would affect its impedance and potentially the high-frequency performance of the circuit. In severe cases, variations in track thickness may also produce a degree of board warping. If the plating in vias and through-holes is thin, this will also reduce the reliability of the through connection – typically a thickness of 25 µm is recommended in order to ensure freedom from porosity and voids and give the through connection a reasonable working life.
The designer will seek to combat this variation by adding copper ‘robbing’ to the board, to even out the distribution of copper on each layer. Not only will this prevent isolated tracks becoming over-thick, it will also improve the balance between different sides of the board, and thus reduce any tendency to warp. At the same time, the designer will avoid holes with high aspect ratios.
The processor will use careful control of the plating conditions, providing sufficient fluid agitation to ensure that the holes are continuously wetted with fresh fluid, and using plating additives to improve the ‘throwing power’ of the solution, that is the ability of the solution to plate down holes.
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